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? 2002 microchip technology inc. preliminary ds41109d-page 1 k ee l oq ? code hopping encoder features security ? two programmable 32-bit serial numbers ? two programmable 64-bit crypt keys ? two programmable 60-bit seed values ? each transmission is unique ? 67/69-bit transmission code length ? 32-bit hopping code ? crypt keys are read protected operating ? 2.05-5.5v operation ? four button inputs ? 15 functions available ? four selectable baud rates ? selectable minimum code word completion ? battery low signal transmitted to receiver ? nonvolatile synchronization data ? pwm, vpwm, ppm, and manchester modulation ? button queue information transmitted ? dual encoder functionality other ? on-chip eeprom ? on-chip tuned oscillator (10% over voltage and temperature) ? button inputs have internal pull-down resistors ?led output ? pll control for ask and fsk ? low external component count typical applications the HCS365 is ideal for remote keyless entry (rke) applications. these applications include: ? automotive rke systems ? automotive alarm systems ? automotive immobilizers ? gate and garage door openers ? identity tokens ? burglar alarm systems package types HCS365 block diagram general description the HCS365 is a code hopping encoder designed for secure remote keyless entry (rke) and secure remote control systems. the HCS365 utilizes the k ee l oq ? code hopping technology, which incorpo- rates high security, a small package outline, and low cost to make this device a perfect solution for unidirec- tional authentication systems and access control sys- tems. the HCS365 combines a hopping code generated by a nonlinear encryption algorithm, a serial number, and status bits to create a secure transmission code. the length of the transmission eliminates the threat of code scanning and code grabbing access techniques. 1 2 3 4 8 7 6 5 s0 s1 s2 s3/shift/ v dd led data vss pdip, soic HCS365 rfen v ss v dd oscillator reset circuit led driver controller power latching and switching button input port 32-bit shift register encoder eeprom data led s3/shift s2 s 1 s 0 rfen HCS365
HCS365 ds41109d-page 2 preliminary ? 2002 microchip technology inc. the crypt key, serial number, and configuration data are stored in an eeprom array which is not accessible via any external connection. the eeprom data is pro- grammable but read protected. the data can be veri- fied only after an automatic erase and programming operation. this protects against attempts to gain access to keys or manipulate synchronization values. in addition, the HCS365 supports a dual encoder. this allows two manufacturers to use the same device with- out having to use the same manufacturers code in each of the encoders. the HCS365 provides an easy to use serial interface for programming the necessary keys, system parameters, and configuration data. 1.0 system overview key terms the following is a list of key terms used throughout this data sheet. for additional information on k ee l oq and code hopping, refer to technical brief (tb003). ? rke - remote keyless entry ? button status - indicates what button input(s) activated the transmission. encompasses the 4 button status bits s3, s2, s1 and s0 (figure 3-2). ? code hopping - a method by which a code, viewed externally to the system, appears to change unpredictably each time it is transmitted. ? code word - a block of data that is repeatedly transmitted upon button activation (figure 3-2). ? transmission - a data stream consisting of repeating code words (figure 4-1). ? crypt key - a unique and secret 64-bit number used to encrypt and decrypt data. in a symmetri- cal block cipher such as the k ee l oq algorithm, the encryption and decryption keys are equal and will therefore be referred to generally as the crypt key. ? encoder - a device that generates and encodes data. ? encryption algorithm - a recipe whereby data is scrambled using a crypt key. the data can only be interpreted by the respective decryption algorithm using the same crypt key. ? decoder - a device that decodes data received from an encoder (i.e., hcs5xx). ? decryption algorithm - a recipe whereby data scrambled by an encryption algorithm can be unscrambled using the same crypt key. ? learn C learning involves the receiver calculating the transmitters appropriate crypt key, decrypting the received hopping code and storing the serial number, synchronization counter value, and crypt key in eeprom. the k ee l oq product family facil- itates several learning strategies to be imple- mented on the decoder. the following are examples of what can be done. - simple learning the receiver uses a fixed crypt key. the crypt key is common to every component used by the same manufacturer. - normal learning the receiver derives a crypt key from the encoder serial number. every transmitter has a unique crypt key. - secure learning the receiver derives a crypt key from the encoder seed value. every encoder has a unique seed value that is only transmitted by a special button combination. ? manufacturers code C a unique and secret 64- bit number used to derive crypt keys. each encoder is programmed with a crypt key that is a function of the manufacturers code. each decoder is programmed with the manufacturer code itself. the HCS365 code hopping encoder is designed specif- ically for keyless entry systems. in particular, typical applications include vehicles and home garage door openers. the encoder portion of a keyless entry sys- tem is integrated into a transmitter carried by the user. the transmitter is operated to gain access to a vehicle or restricted area. the HCS365 is meant to be a cost- effective yet secure solution to such systems requiring very few external components (figure 2-1). most low end keyless entry transmitters are given a fixed identification code that is transmitted every time a button is pushed. the number of unique identification codes in a low end system is usually a relatively small number. these shortcomings provide an opportunity for a sophisticated thief to create a device that grabs a transmission and retransmits it later or a device that quickly scans all possible identification codes until the correct one is found. the HCS365, on the other hand, employs the k ee l oq code hopping technology coupled with a transmission length of 67 bits to virtually eliminate the use of code grabbing or code scanning. the high security level of the HCS365 is based on the patented k ee l oq technol- ogy. a block cipher based on a block length of 32 bits and a key length of 64 bits is used. the algorithm obscures the information in such a way that if a single hopping code data bit changes (before encryption), sta- tistically more than 50% of the encrypted data bits will change.
? 2002 microchip technology inc. preliminary ds41109d-page 3 HCS365 as indicated in the block diagram on page one, the HCS365 has a small eeprom array which must be loaded with several parameters before use; most often programmed by the manufacturer at the time of produc- tion. the most important of these are: ? a serial number, typically unique for every encoder ? a crypt key ? an initial synchronization value the crypt key generation typically inputs the transmitter serial number and 64-bit manufacturers code into the key generation algorithm (figure 1-1). the manufac- turers code is chosen by the system manufacturer and must be carefully controlled as it is a pivotal part of the overall system security. figure 1-1: creation and storage of crypt key during production the valid synchronization counter is the basis behind the transmitted code word changing for each transmis- sion; it increments each time a button is pressed. each increment of the synchronization value results in more than 50% of the hopping code bits changing. figure 1-2 shows how the key values in eeprom are used in the encoder. once the encoder detects a button press, it reads the button inputs and updates the syn- chronization counter. the synchronization counter and crypt key are input to the encryption algorithm and the output is 32 bits of encrypted information. this data will change with every button press while its value will appear to randomly hop around. hence, this data is referred to as the hopping portion of the code word. the 32-bit hopping code is combined with the button information and serial number to form the code word transmitted to the receiver. the code word format is explained in greater detail in section 4.1. a receiver may use any type of controller as a decoder. typically, it is a microcontroller with compatible firm- ware that allows the decoder to operate in conjunction with an HCS365 based transmitter. a transmitter must first be learned by the receiver before its use is allowed in the system. learning includes calculating the transmitters appropriate crypt key, decrypting the received hopping code, storing the serial number, storing the synchronization counter value, and storing crypt key in eeprom. in normal operation, each received message of valid format is evaluated. the serial number is used to deter- mine if it is from a learned transmitter. if the serial num- ber is from a learned transmitter, the message is decrypted and the synchronization counter is verified. finally, the button status is checked to see what opera- tion is requested. figure 1-3 shows the relationship between some of the values stored by the receiver and the values received from the transmitter. for detailed decoder operation, see section 7.0. transmitter manufacturers serial number code crypt key key generation algorithm serial number crypt key sync counter . . . HCS365 production programmer eeprom array
HCS365 ds41109d-page 4 preliminary ? 2002 microchip technology inc. figure 1-2: building the transmitted code word (encoder) figure 1-3: basic operation of receiver (decoder) note: circled numbers indicate the order of execution. button press information eeprom array 32 bits encrypted data serial number transmitted information crypt key sync counter serial number k ee l oq encryption algorithm button press information eeprom array manufacturer code 32 bits of encrypted data serial number received information decrypted synchronization counter verify counter sync counter serial number k ee l oq decryption algorithm 1 3 4 check for match 2 perform function indicated by button press 5 crypt key
? 2002 microchip technology inc. preliminary ds41109d-page 5 HCS365 2.0 device description as shown in the typical application circuits (figure 2-1), the HCS365 is an easy device to use. it requires only the addition of buttons and rf circuitry for use as the encoder in your security application. a description of each pin is described in table 2-1. refer to figure 2-2 for information on the i/o pins. table 2-1: pin descriptions the HCS365 will normally be in a low power sleep mode. when a button input is taken high, the device will wake up, start the step-up regulator, and go through the button debounce delay of t db before the button code is latched. in addition, the device will then read the con- figuration options. depending on the configuration options and the button code, the device will determine what the data and modulation format will be for the transmission. the transmission will consist of a stream of code words and will be transmitted t pu after the but- ton is pressed for as long as the buttons are held down or until a time-out occurs. the code word format can be either a code hopping format or a seed format. the time-out time can be selected with the time-out select (tsel) configuration option. this option allows the time-out to be set to 0.8s, 3.2s, 12.8s, or 25.6s. when a time-out occurs, the device will go into sleep mode to protect the battery from draining when a button gets stuck. if the device is in the transmit process and detects that a new button is pressed, the current code word will be aborted, a new code word will be transmitted and the time-out counter will reset. if all the buttons are released, a minimum number of code words will still be completed. the minimum code words can be set to 1, 2, 4, or 8 using the minimum code words (mtx) con- figuration option. if the time for transmitting the mini- mum code words is longer than the time-out time, the device will not complete the minimum code words. note: s0-s3 inputs have pull-down resistors. v in should be tied high if the step-up regulator is not used. name pin number description s0 1 switch input 0 s1 2 switch input 1 s2 3 switch input 2 s3/ shift/ rfen 4 switch input 3, shift button or rf enable output v ss 5 ground reference data 6 data output pin/ led 7 open drain output for led v dd 8 positive supply voltage
HCS365 ds41109d-page 6 preliminary ? 2002 microchip technology inc. the HCS365 has an onboard nonvolatile eeprom. this eeprom is used to store user programmable data and the synchronization counter. the data is pro- grammed at the time of production and includes the security related information such as encoder keys, serial numbers, discrimination values, and seed val- ues. all the security related options are read protected. the initial counter value is also programmed at the time of production. from then on the device maintains the counter itself. the HCS365 has built in redundancy for protection and can recover from counter corruption. the counter will not increment if the previous write was corrupted by low voltage reset or power failure dur- ing t pll . instead, the counter will revert back to the previous count and the hcs370 will attempt to correct the bad bits. this will continue on every button press until the voltage increases and the counter is success- fully corrected. figure 2-1: typical circuits v dd b0 s0 s1 s2 rfen led v dd data v ss three buttons remote with pll control b1 v dd tx out s0 s1 s2 s3 led v dd data v ss five buttons remote control (note) b4 b3 b2 b1 b0 note: up to 15 functions can be implemented by pressing more than one button simulta- neously or by using a suitable diode array. v dd tx out s0 s1 s2 shift led v dd data v ss b1 b0 tx1 tx2 dual transmitter remote control rf pll d ata i n e nable b2
? 2002 microchip technology inc. preliminary ds41109d-page 7 HCS365 figure 2-2: i/o circuits figure 2-3: basic flow diagram of the device operation z in s0, s1, s2 inputs v dd data i/o nfet pfet data out figure 2-2(a) figure 2-2(b) figure 2-2(c) data, rfen n p step outputs v dd start sample buttons increment seed time- out encrypt no no yes get config tx? counter transmit mtx no buttons seed time read seed stop yes yes no yes no no yes yes yes seed button no new buttons no
HCS365 ds41109d-page 8 preliminary ? 2002 microchip technology inc. 3.0 eeprom organization a summary of the hcs370 eeprom organization is shown in the three tables below. the address column shows the starting address of the option and its length or bit position. options larger than 8 bits are stored with the most significant bits at the given address. enough consecutive 8-bit blocks are reserved for the entire option size. options such as seed1, which have a length that is not an exact multiple of 8 bits, is stored right justified in the reserved space. additional smaller options such as sdbt1 may be stored in the same address as the most significant bits. table 3-1: encoder1 options (shift=0) note 1: all timing values vary 10%. symbol address 16 :bits description (1) reference section key1 1e: 64 bits encoder key 3.2.2 seed1 14: 60 bits encoder seed value 3.3 sync1 00: 20 bits 00: 18 bits encoder synchronization counter (cntsel=1) encoder synchronization counter (cntsel=0) plus overflow 3.2, 3.2.1 ser1 10: 32 bits encoder serial number 3.2.2 disc1 1c: 10 bits encoder discrimination value 3.2, 3.2.1 msel1 1c: ---- 32-- transmission modulation format value 2 format 4.1 00 pwm 01 manchester 10 vpwm 11 ppm hsel1 1c: ---4 ---- header select 4 t e = 0 10 t e = 1 4.1 xser1 1c: --5- ---- extended serial number 28 bits = 0 32 bits = 1 3.2 quen1 1c: -6-- ---- queue counter enable disable = 0 enable = 1 5.5 sten1 1c: 7--- ---- start/stop pulse enable disable = 0 enable = 1 4.1 ledbl1 3f: -6-- ---- low voltage led blink never = 0 once = 1 5.3 ledos1 3f: 7--- ---- led on time select (1) 50 ms = 0 100 ms = 1 5.3 sdlm1 3c: ---- ---0 limited seed disable = 0 enable = 1 3.3 sdmd1 3c: ---- --1- seed mode user = 0 production = 1 3.3 sdbt1 14: 7654 ---- seed button code 3.3 sdtm1 3c: ---- 32-- time before seed code word (1) value 2 time (s) 3.3 00 0.0 01 0.8 10 1.6 11 3.2 bsel1 3c: --54 ---- transmission baud rate select (1) value 2 t e ( m s) 4.1 00 100 01 200 10 400 11 800 gsel1 3c: 76-- ---- guard time select (1) value 2 time (ms) 4.1, 5.2 00 00 01 6.4 10 51.2 11 102.4
? 2002 microchip technology inc. preliminary ds41109d-page 9 HCS365 table 3-2: encoder2 options (shift=1) symbol address 16 :bits description (1) reference section key2 34: 64 bits encoder key 3.2.1 seed2 2a: 60 bits encoder seed value 3.3 sync2 08: 20 bits 08: 18 bits encoder synchronization counter (cntsel=1) encoder synchronization counter (cntsel=0) plus overflow 3.2, 3.2.1 ser2 26: 32 bits encoder serial number 3.2, 3.2.2 disc2 32: 10 bits encoder discrimination value 3.2, 3.2.1 msel2 32: ---- 32-- transmission modulation format value 2 format 4.1 00 pwm 01 manchester 10 vpwm 11 ppm hsel2 32: ---4 ---- header select 4 t e = 0 10 t e = 1 4.1 xser2 32: --5- ---- extended serial number 28 bits = 0 32 bits = 1 3.2 quen2 32: -6-- ---- queue counter enable disable = 0 enable = 1 5.5 sten2 32: 7--- ---- start/stop pulse enable disable = 0 enable = 1 4.1 ledbl2 3d: -6-- ---- low voltage led blink never = 0 once = 1 5.3 ledos2 3d: 7--- ---- led on time select (1) 50 ms = 0 100 ms = 1 5.3 sdlm2 3e: ---- ---0 limited seed disable = 0 enable = 1 3.3 sdmd2 3e: ---- --1- seed mode user = 0 production = 1 3.3 sdbt2 2a: 7654 ---- seed button code 3.3 sdtm2 3e: ---- 32-- time before seed code word (1) value 2 time (s) 3.3 00 0.0 01 0.8 10 1.6 11 3.2 bsel2 3e: --54 ---- transmission baud rate select (1) value 2 t e ( m s) 4.1 00 100 01 200 10 400 11 800 gsel2 3e: 76-- ---- guard time select (1) value 2 time (ms) 4.1, 5.2 00 2 t e 01 6.4 10 51.2 11 102.4 note 1: all timing values vary 10%. 2: voltage thresholds are 150 mv.
HCS365 ds41109d-page 10 preliminary ? 2002 microchip technology inc. table 3-3: device options 3.1 dual encoder operation the HCS365 contains two transmitter configurations with separate serial numbers, encoder keys, discrimi- nation values, counters, and seed values. this means that the HCS365 can be used as two independent encoders. the code word is calculated using one of two possible encoder configurations. most options for code word and modulation formats can be different from encoder 1 and encoder 2. however, led and rf transmitter options have to be the same. the shift input pin is used to select between the encoder config- urations. a low on the shift pin will select encoder 1 and a high will select encoder 2. symbol address 16 :bits description (1) reference section wake 3f: ---- --10 wake-up (1) value 2 value 4.1 00 no wake-up 01 75 ms 50% 10 50 ms 33.3% 11 100 ms 16.7% cntsel 3f: ---- -2-- counter select 16 bits = 0 20 bits = 1 3.2.1 vlowl 3f: ---- 3--- low voltage latch enable disable = 0 enable = 1 3.2.3.1 vlowsel 3f: ---4 ---- low voltage trip point select (2) 2.2 v = 0 3.2v = 1 3.2.3.1 pllsel 3f: --5- ---- pll interface select ask = 0 fsk = 1 5.2 mtx 3d: ---- --10 minimum code words value 2 value 2.0 00 1 01 2 10 4 11 8 tsel 3d: --54 ---- time-out select (1) value 2 time(s) 2.0 00 0.8 01 3.2 10 12.8 11 25.6 dual 3d:-----2-- dual encoder enable disable = 0 enable = 1 rfeno 3d: ----3--- rf enable output select disable = 0 enable = 1 note 1: all timing values vary 10%. 2: voltage thresholds are 150 mv.
? 2002 microchip technology inc. preliminary ds41109d-page 11 HCS365 3.2 code word format a k ee l oq code word consists of 32 bits of hopping code data, 32 bits of fixed code data, and between 3 to 5 bits of status information. various code word formats are shown in figure 3-1 and figure 3-2. 3.2.1 hopping code portion the hopping code portion is calculated by encrypting the counter, discrimination value, and function code with the encoder key (key). the hopping code is cal- culated when a button press is debounced and remains unchanged until the next button press. the counter can be either a 16- or 20-bit counter. the configuration option counter select (cntsel) value will determine this. the counter select option must be the same for both encoder 1 and encoder 2. if the 16-bit counter is selected, the discrimination value is 10 bits long and there are 2 counter overflow bits (ovr0, ovr1). set both bits in production and ovr0 will be cleared on the first counter overflow and ovr1 on the second. if the counter is 20 bits, the discrimination value is 8 bits long and there are no overflow bits. the rest of the 32 bits are made up of the function code also known as the button inputs. the discrimination value can be programmed with any value to serve as a post decryption check on the decoder end. in a typical system, this will be pro- grammed with the 8 or 10 least significant bits of the serial number. this will be stored by the receiver sys- tem after a transmitter has been learned. the discrimi- nation bits are part of the information that is to form the encrypted portion of the transmission. 3.2.2 fixed code portion the 32 bits of fixed code consist of 28 bits of the serial number (ser) and a copy of the 4-bit function code. this can be changed to contain the whole 32-bit serial number by setting the extended serial number (xser) configuration option to a 1. if more than one button is pressed, the function codes are logically ored together. the function code is repeated in the encrypted and unencrypted data of a transmission. table 3-4: function codes 3.2.3 status information the status bits will always contain the output of the low voltage (v low ) detector and cyclic redundancy check (crc). if queue (quen) is enabled, button queue information will be included in the code words. figure 3-1: code word data format (16-bit counter) button function code s0 xx1x 2 s1 x1xx 2 s2 1xxx 2 s3 xxx1 2 fixed code portion (32 bits) crc 2 bits v low 1-bit serial number (28 bits) c1 c0 s2 s1 s0 s3 but 4 bits counter overflow 2 bits disc 10 bits synchronization 16 bits counter 15 0 s1 s2 s0 s3 ovr1 ovr0 transmission direction lsb first hopping code portion (32 bits) with xser=0, 16-bit counter, quen=0 status information (3 bits) but 4 bits fixed code portion (32 bits) que 2 bits crc 2 bits v low 1-bit serial number (32 bits) q1 q0 c1 c0 but 4 bits counter overflow 2 bits disc 10 bits synchronization 16 bits counter 15 0 s2 s1 s0 s3 ovr1 ovr0 hopping code portion (32 bits) with xser=1, 16-bit counter, quen=1 status information (5 bits)
HCS365 ds41109d-page 12 preliminary ? 2002 microchip technology inc. figure 3-2: code word data format (20-bit counter) 3.2.3.1 low voltage detector status (v low ) a low battery voltage detector onboard the HCS365 can indicate when the operating voltage drops below a predetermined value. there are two options available depending on the low voltage trip point select (vlowsel) configuration option. the two options pro- vided are: ? a 2.2v nominal level for 3v operation ? a 3.2v nominal level for 5v operation the output of the low voltage detector is transmitted in each code word, so the decoder can give an indication to the user that the transmitter battery is low. operation of the led changes as well to further indicate that the battery is low and needs replacing. the output of the low voltage detector can also be latched once it has dropped below the selected value. the low voltage latch (vlowl) configuration option enables this option. if this option is enabled, the detec- tor level is raised to 3v or 5v once a low battery voltage has been detected. the original value is reinstated if the v dd voltage is raised above this level, indicating that a new battery has been installed. the low voltage latch (vlowl) if enabled works sim- ilar to a schmitt trigger. this will effectively hold the v low bit high until the battery is replaced. if the low voltage latch is enabled, then the break after the first preamble pulse can stretch by 4 ms one time as the latch changes state. fixed code portion (32 bits) que 2 bits crc 2 bits v low 1-bit serial number (28 bits) q1 q0 c1 c0 s2 s1 s0 s3 but 4 bits disc 8 bits synchronization 20 bits counter 19 0 s2 s1 s0 s3 hopping code portion (32 bits) with xser=0, 20-bit counter, quen=1 status information (5 bits) but 4 bits fixed code portion (32 bits) crc 2 bits v low 1-bit serial number (32 bits) c1 c0 but 4 bits disc 8 bits synchronization 20 bits counter 19 0 s2 s1 s0 s3 hopping code portion (32 bits) with xser=1, 20-bit counter, quen=0 status information (3 bits) transmission direction lsb first
? 2002 microchip technology inc. preliminary ds41109d-page 13 HCS365 3.3 seed code word data format a seed transmission transmits a code word that con- sists of 60 bits of fixed data that is stored in the eeprom. this can be used for secure learning of encoders or whenever a fixed code transmission is required. the seed code word contains the function code. the seed code also contains the status informa- tion (v low , crc, and queue). the seed code word format is shown in figure 3-3. the function code for seed code words is always 1111 2 . seed code words for encoder 1 and encoder 2 can be configured as follows: ? enabled with the seed button code (sdbt) con- figuration option or disabled if sdbt = 0000 2 . ? if the limited seed (sdlm) configuration option is set, seed transmissions will be disabled when the synchronization counter is bigger than 127. seed transmissions remain disabled even if the 16/20- bit counter rolls over to 0. ? the delay before the seed transmission is trans- mitted can be set to 0.0s, 0.8s, 1.6s and 3.2s with the seed time (sdtm) configuration option. when sdtm is set to a value other than 0.0s, the HCS365 will transmit a code hopping transmis- sion until the selected time expires. after the selected time expires, the seed code words are transmitted. this is useful for the decoder to learn the serial number and the seed from a single but- ton press. ? the button code for transmitting a seed code word can be selected with the seed button (sdbt) configuration option. sdbt bits 0 to 3 cor- respond to button inputs s0 to s3. set the bits high for the button combination that should trigger a seed transmission (i.e., if sdbt = 1010 2 then, s3+s1 will trigger a seed transmission). ? the seed transmissions before the counter incre- ments past 128 can be modified with the seed mode (sdmd) configuration option. setting this bit for production mode will cause the selected seed button combination to first transmit a normal hopping code word for the selected minimum code words (mtx) and then at least mtx seed code words until all buttons are released. this mode is disabled after the counter reaches 128 even if the 16/20-bit counter rolls over to 0. ? the limit of 127 for sdlm or sdmd can be reduced by using an initial counter value >0. figure 3-3: seed code word format note: the synchronization counter only incre- ments on code hopping transmissions. the counter will not advance on a seed transmission unless seed delay or pro- duction mode options are on. transmission direction lsb first open portion (not encrypted) que (2 bits) crc (2 bits) v low (1-bit) seed with quen = 1 function (4 bits) (9 bits) seed code (60 bits) q1 q0 c1 c0 111 1
HCS365 ds41109d-page 14 preliminary ? 2002 microchip technology inc. 4.0 transmitted word 4.1 transmission modulation format the HCS365 transmission is made up of several code words. each code word contains a preamble, header, and data. a code word is separated from another code word by guard time. the guard time select (gsel) configuration option can be set to 0 ms, 6.4 ms, 51.2 ms, or 102.4 ms. all other timing specifications for the modulation for- mats are based on a basic timing element (t e ). this timing element can be set to 100 m s, 200 m s, 400 m s or 800 m s with the baud rate select (bsel) configuration option. the header time can be set to 4t e or 10t e with the header select (hsel) configuration option. these options can all be set individually for encoder 1 and encoder 2. there are four different modulation formats available on the HCS365 that can be set individually for encoder 1 or encoder 2. the modulation select (msel) config- uration option is used to select between: ? pulse width modulation (pwm) ? manchester (man) ? variable pulse width modulation (vpwm) ? pulse position modulation (ppm) figure 4-1: pulse width modulation (pwm) figure 4-2: manchester (man) logic "1" guard time encrypted portion fixed code portion logic "0" 4-10 header t e t e t e xt e 1 16 t bp 31xt e 50% preamble guard header encrypted portion fixed code portion start bit stop bit time bit 0 bit 1 bit 2 logic "0" logic "1" t e t e t bp 31xt e 50% preamble 1 216 4 xt e
? 2002 microchip technology inc. preliminary ds41109d-page 15 HCS365 figure 4-3: variable pulse width modulation (vpwm) figure 4-4: pulse position modulation (ppm) in addition to the modulation format, guard time, and baud rate, the following options are also available to change the transmission format: ? if the start/stop pulse enable (sten) config- uration option is enabled, the HCS365 will place a leading and trailing 1 on each code word. this is necessary for modulation formats such as manchester and ppm to interpret the first and last data bit. ? a wake-up sequence can be transmitted before the transmission starts. the wake-up sequence is configured with the wake-up (wake) configura- tion option and can be disabled or set to 50 ms, 75 ms, or 100 ms of pulses as indicated in figure 4-5. ? the wake option is the same for both encoder 1 and encoder 2. figure 4-5: wake-up enable vpwm bit encoding: t bp on transition low to high t bp logic 0 t bp logic 1 t e on transition high to low 2 x t e t e t bp t e guard time 10xt e header encrypted portion fixed code portion 2 x t e 31xt e 50% preamble 1 216 t e t e logic 0 logic 1 logic "1" logic "0" t e t e t e guard time fixed code portion encrypted portion t bp t bp 31xt e 50% preamble start bit stop bit 10xt e header 1 216 3 x te wake-up = 75 ms wake-up = 50 ms wake-up = 100 ms wake-up guard time = 6.4 ms, 51.2 ms, or 102.4 ms code code t e t e t e 2t e t e 5t e t g t g
HCS365 ds41109d-page 16 preliminary ? 2002 microchip technology inc. 5.0 special features 5.1 internal rc oscillator the HCS365 has an onboard rc oscillator that con- trols all the logic output timing characteristics. the oscillator frequency varies over temperature and volt- age variances, but stays within 10% of the tuned value. all the timing values specified in this document are subject to this oscillator variation. 5.2 rf enable and pll interface the s3/shift/rfen pin of the HCS365 can be config- ured to function as a rf enable output signal. this is done with the rf enable output (rfeno) configura- tion option. when enabled, this pin will be driven high whenever data is transmitted through the data pin. if the rfen output is enabled it will not be possible to uti- lize the dual encoder functionality. in addition, the rf enable and data output interfaces with rf plls. the pll interface select (pllsel) con- figuration option selects between the ask and fsk interfaces. figure 5-1 shows the startup sequence for both ask and fsk interface options. the rfen signal will go low at the end of the last code word, including the guard time. if rfeno = 1, the rfen pin will be driven high when- ever data is transmitted through the data pin. figure 5-1: ask/fsk interface 5.3 led output the led pin will be driven low while the HCS365 is transmitting data. the led on time (t ledon ) can be selected between 50 ms and 100 ms with the led on time select (ledos) configuration option. the led off time (t ledoff ) is fixed at 500 ms. when the v dd voltage drops below the selected v low trip point, the led will not blink unless the led blink (ledbl) option is set. if ledbl is set and v dd is low, then the led will only flash once. waveforms of the led behavior are shown in figure 5-2. for circuits with v dd greater than 3 volts, be sure to limit the led circuit with a series resistor. the led out- put can safely sink up to 25 ma but adding an external resistor will conserve battery power. this is an open drain output but it does have a weak pull-up capable of driving a cmos input. s0 ask rfen ask data fsk rfen fsk data t pu t pll t g code word code word code word code word t g
? 2002 microchip technology inc. preliminary ds41109d-page 17 HCS365 figure 5-2: led operation 5.4 cyclic redundancy check (crc) the crc bits are calculated on the 65 previously trans- mitted bits. these bits contain the 32-bit hopping code, 32-bit fixed code, and v low bit. the decoder can use the crc bits to check the data integrity before process- ing starts. the crc can detect all single bit errors and 66% of double bit errors. the crc is computed as fol- lows: equation 5-1: crc calculation and with and di n the nth transmission bit 0 <= n <= 64 5.5 button queue information (queue) the queuing or repeated pressing of the same buttons can be handled in two ways on the HCS365. this is controlled with the queue counter enable (quen) configuration option. this option can be different for encoder 1 and encoder 2. when the quen option is disabled, the device will reg- ister up to two sequential button presses. in this case, the device will complete the minimum code words selected with the mtx option before the second code word is calculated and transmitted. the code word will be 67 bits in this case, with no additional queue bits transmitted. if the quen option is enabled, the queue bits are added to the standard code word. the queue bits are a 2-bit counter that does not wrap. the counter value starts at 00 2 and is incremented if a button is pushed within 2 seconds from the start of the previous button press. the current code word is terminated when a but- ton is queued. this allows additional functionality for double or triple button presses. figure 5-3: code word completion with quen settings 6.0 programming specifications refer to the HCS365 programming specifications document (ds41157) in microchip literature. sn led led v dd > v low v dd < v low t ledon t ledoff ledbl=1 led v dd < v low ledbl=0 crc 1 [] n1 + crc 0 [] n di n ? = crc 0 [] n1 + crc 0 [] n di n ? () crc 1 [] n ? = crc 1 0 , [] 0 0 = sn quen = disabled quen = enabled data wake-up code2 code2 mtx = 01 2 , wake > 00 2 code1 code1 wake-up data wake-up code1 wake-up 00 code2 01 code2 01
HCS365 ds41109d-page 18 preliminary ? 2002 microchip technology inc. 7.0 integrating the HCS365 into a system use of the HCS365 in a system requires a compatible decoder. this decoder is typically a microcontroller with compatible firmware. microchip will provide (via a license agreement) firmware routines that accept transmissions from the HCS365 and decrypt the hopping code portion of the data stream. these routines provide system designers the means to develop their own decoding system. 7.1 learning a transmitter to a receiver a transmitter must first be 'learned' by a decoder before its use is allowed in the system. several learning strat- egies are possible. figure 7-1 details a typical learn sequence. the decoder must minimally store each learned transmitter's serial number and current syn- chronization counter value in eeprom. additionally, the decoder typically stores each transmitter's unique crypt key. the maximum number of learned transmit- ters will therefore be relative to the available eeprom. a transmitter's serial number is transmitted in the 32-bit fixed code, but the synchronization counter only exists in the code word's encrypted portion. the decoder obtains the counter value by decrypting using the same key used to encrypt the information. the k ee l oq algo- rithm is a symmetrical block cipher so the encryption and decryption keys are identical and referred to gen- erally as the crypt key. the encoder receives its crypt key during manufacturing. the decoder typically calcu- lates the crypt key by running the encoder serial num- ber or seed through the key generation routine. figure 7-1 summarizes a typical learn sequence. the decoder receives and authenticates a first transmis- sion; first button press. authentication involves gener- ating the appropriate crypt key, decrypting, validating the correct key usage via the discrimination bits, and buffering the counter value. a second transmission is received and authenticated. a final check verifies the counter values were sequential; consecutive button presses. if the learn sequence is successfully com- pleted, the decoder stores the learned transmitter's serial number, current synchronization counter value, and appropriate crypt key. from now on, the crypt key will be retrieved from eeprom during normal opera- tion instead of recalculating it for each transmission received. certain learning strategies have been patented by 3rd parties and care must be taken not to infringe. figure 7-1: typical learn sequence enter learn mode wait for reception of a valid code generate key from serial number use generated key to decrypt compare discrimination value with fixed value equal wait for reception of second valid code compare discrimination value with fixed value use generated key to decrypt equal counters encryption key serial number synchronization counter sequential ? ? ? exit learn successful store: learn unsuccessful no no no yes yes yes
? 2002 microchip technology inc. preliminary ds41109d-page 19 HCS365 7.2 decoder operation figure 7-2 summarizes normal decoder operation. the decoder waits until a transmission is received. the received serial number is compared to the eeprom table of learned transmitters to first determine if this transmitter's use is allowed in the system. if from a learned transmitter, the transmission is decrypted using the stored crypt key and authenticated via the discrimination bits for appropriate crypt key usage. if the decryption was valid the synchronization value is evaluated. figure 7-2: typical decoder operation 7.3 synchronization with decoder (evaluating the counter) the k ee l oq technology patent scope includes a sophisticated synchronization technique that does not require the calculation and storage of future codes. the technique securely blocks invalid transmissions while providing transparent resynchronization to transmitters inadvertently activated away from the receiver. figure 7-3 shows a 3-partition, rotating synchronization window. the size of each window is optional but the technique is fundamental. each time a transmission is authenticated, the intended function is executed and the transmission's synchronization counter value is stored in eeprom. from the currently stored counter value there is an initial "single operation" forward win- dow of 16 codes. if the difference between a received synchronization counter and the last stored counter is within 16, the intended function will be executed on the single button press and the new synchronization counter will be stored. storing the new synchronization counter value effectively rotates the entire synchroniza- tion window. a "double operation" (resynchronization) window fur- ther exists from the single operation window up to 32k codes forward of the currently stored counter value. it is referred to as "double operation" because a transmission with synchronization counter value in this window will require an additional, sequential counter transmission prior to executing the intended function. upon receiving the sequential transmission the decoder executes the intended function and stores the synchronization counter value. this resynchronization occurs transparently to the user as it is human nature to press the button a second time if the first was unsuc- cessful. the third window is a "blocked window" ranging from the double operation window to the currently stored synchronization counter value. any transmission with synchronization counter value within this window will be ignored. this window excludes previously used, perhaps code-grabbed transmissions from accessing the system. ? transmission received does serial number match ? decrypt transmission is decryption valid ? is counter within 16 ? is counter within 32k ? update counter execute command save counter in temp location start no no no no yes yes yes yes yes no and no note: the synchronization method described in this section is only a typical implementation and because it is usually implemented in firmware, it can be altered to fit the needs of a particular system.
HCS365 ds41109d-page 20 preliminary ? 2002 microchip technology inc. figure 7-3: synchronization window 7.4 security considerations the strength of this security is based on keeping a secret inside the transmitter that can be verified by encrypted transmissions to a trained receiver. the transmitter's secret is the manufacturer's key, not the encryption algorithm. if that key is compromised then a smart transceiver can capture any serial number, cre- ate a valid code word, and trick all receivers trained with that serial number. the key cannot be read from the eeprom without costly die probing but it can be calculated by brute force decryption attacks on trans- mitted code words. the cost for these attacks should exceed what you would want to protect. to protect the security of other receivers with the same manufacturer's code, you need to use the random seed for secure learn. it is a second secret that is unique for each transmitter. its transmission on a special button press combination can be disabled if the receiver has another way to find it, or limited to the first 127 trans- missions for the receiver to learn it. this way, it is very unlikely to ever be captured. now if a manufacturer's key is compromised, clone transmitters can be created, but without the unique seed they have to be relearned by the receiver. in the same way, if the transmissions are decrypted by brute force on a computer, the ran- dom seed hides the manufacturer's key and prevents more than one transmitter from being compromised. the length of the code word at these baud rates makes brute force attacks that guess the hopping code take years. to make the receiver less susceptible to this attack, make sure that you test all the bits in the decrypted code for the correct value. do not just test low counter bits for sync and the bit for the button input of interest. the main benefit of hopping codes is to prevent the retransmission of captured code words. this works very well for code words that the receiver decodes. its weakness is if a code is captured when the receiver misses it, the code may trick the receiver once if it is used before the next valid transmission. to make the receiver more secure it could increment the counter on questionable code word receptions. to make the trans- mitter more secure, it could use separate buttons for lock and unlock functions. another way would be to require two different buttons in sequence to gain access. there are more ways to make k ee l oq systems more secure, but they all have trade-offs. you need to find a balance between security, design effort, and usability, particularly in failure modes. for example, if a button sticks or kids play with it, the counter should not end up in the blocked code window rendering the transmitter useless or requiring retraining. blocked entire window rotates to eliminate use of previously used codes single operation window window (32k codes) (16 codes) double operation (resynchronization) window (32k codes) stored synchronization counter value
? 2002 microchip technology inc. preliminary ds41109d-page 21 HCS365 8.0 development support the k ee l oq ? family of devices are supported with a full range of hardware and software development tools: ? integrated development environment - mplab ? ide software -k ee l oq toolkit software ? device programmers -pro mate ? ii universal device program- mer ? low cost demonstration boards -k ee l oq evaluation kit ii -k ee l oq transponder evaluation kit 8.1 mplab integrated development environment software the same mplab ide software available at www.microchip.com that is used for microcontroller software development also supports the k ee l oq family of devices. with this windows ? -based application you can configure the device options in a graphical environ- ment. the manufacturers code is protected by two custodian keys so that the secret is split and neither employee can reveal the code alone. once both custo- dian keys have been entered and the options selected, mplab ide software is ready to produce parts in one of two ways. ? the pro mate ii programmer, which is sold sep- arately, can program individual parts. mplab ide software can automatically increment the serial number and recalculate the unique encryption key, discrimination value and seed for each part. ? creating an sqtp sm file that contains all the indi- vidual device configurations to submit to micro- chip for a production run without revealing your manufacturers code. please contact microchip sales office etc., minimum order quantities apply. 8.2 k ee l oq ? toolkit software the k ee l oq ? secure solution cd-rom is available free and can be ordered with part number ds40038. after accepting the k ee l oq license agreement, it will let you install application notes with complete decoder algorithms as well as the k ee l oq toolkit. the toolkit is a handy application that generates encryption keys from the manufacturers code and serial number or seed. it can also decrypt k ee l oq transmitters hopping code to help debug and test your decoder software. 8.3 pro mate ii universal device programmer the pro mate ii universal device programmer is a full-featured programmer, capable of operating in stand-alone mode, as well as pc-hosted mode. the pro mate ii device programmer is ce compliant. the pro mate ii device programmer has programma- ble v dd and v pp supplies, which allow it to verify pro- grammed memory at v dd min and v dd max for maximum reliability. it has an lcd display for instruc- tions and error messages, keys to enter commands and a modular detachable socket assembly to support various package types. microchip has various socket adapter modules avail- able for pdip, soic and ssop devices. an in-circuit serial programming? (icsp?) module is also avail- able for programming devices after circuit assembly. 8.4 k ee l oq evaluation kit ii the k ee l oq evaluation kit ii contains all the necessary hardware to evaluate a code hopping system, including two transmitters and a multi-function receiver board that supports all hcs5xx stand-alone decoders. addi- tionally, it allows the users to develop their own soft- ware to receive, decode and interpret the k ee l oq transmission. the included pc software can configure and program the k ee l oq parts for evaluation (dm303006). 8.5 k ee l oq transponder evaluation kit the k ee l oq transponder evaluation kit consists of a base station, a transmitter/transponder, a battery-less transponder and various hcs4xx samples. it also includes the pc software to configure and program the k ee l oq parts for evaluation (dm303005).
HCS365 ds41109d-page 22 preliminary ? 2002 microchip technology inc. table 8-1: development tools from microchip pic12cxxx rfpic12xxxx pic14000 pic16c5x pic16c6x pic16cxxx pic16f62x pic16c7x pic16c7xx pic16c8x pic16f8xx pic16c9xx pic17c4x pic17c7xx pic18cxx2 pic18fxxx 24cxx/ 25cxx/ 93cxx hcsxxx rfhcsxxx mcrfxxx mcp2510 software tools mplab ? integrated development environment 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 mplab ? c17 c compiler 9 9 mplab ? c18 c compiler 9 9 mpasm tm assembler/ mplink tm object linker 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 emulators mplab ? ice in-circuit emulator 9 9 9 9 9 9 ** 9 9 9 9 9 9 9 9 9 debugger mplab ? icd in-circuit debugger 9 9 9 9 programmers picstart ? plus entry level development programmer 9 9 9 9 9 9 ** 9 9 9 9 9 9 9 9 9 pro mate ? ii universal device programmer 9 9 9 9 9 9 ** 9 9 9 9 9 9 9 9 9 9 9 demo boards and eval kits picdem tm 1 demonstration board 9 9 9 ? 9 9 picdem tm 2 plus demonstration board 9 ? 9 ? 9 9 9 picdem tm 3 demonstration board 9 picdem tm 14a demonstration board 9 picdem tm 17 demonstration board 9 k ee l oq ? evaluation kit ii 9 k ee l oq ? transponder kit 9 microid tm programmer s kit 9 125 khz microid tm developers kit 9 125 khz anticollision microid tm developers kit 9 13.56 mhz anticollision microid tm developers kit 9 mcp2510 can developers kit 9 * contact the microchip technology inc. web site at www.microchip.com for information on how to use the mplab ? icd in-circuit debugger (dv164001) with pic16c62, 63, 64, 65, 72, 73, 74, 76, 77. ** contact microchip technology inc. for availability date. ? development tool is available on select devices.
? 2002 microchip technology inc. preliminary ds41109d-page 23 HCS365 9.0 electrical characteristics 9.1 maximum ratings* ambient temperature under bias................................................................................................. ............ -40c to +125c storage temperature ............................................................................................................ .................. -65c to +150c voltage on v dd w/respect to v ss ................................................................................................................ -0.3 to +7.5v voltage on led w/respect to v ss ..................................................................................................................-0.3 to +11v voltage on all other pins w/respect to v ss ........................................................................................-0.3v to v dd + 0.3v total power dissipation (note 1) ..........................................................................................................................500 m w maximum current out of v ss pin ........................................................................................................................... 100 ma maximum current into v dd pin ........................................................................................................................... ...100 ma input clamp current, i ik (v i < 0 or v i > v dd ) ......................................................................................................... 20 ma output clamp current, i ok (vo < 0 or vo >v dd ).................................................................................................... 20 ma maximum output current sunk by any output pin.................................................................................. ..................25 ma maximum output current sourced by any output pin ............................................................................... ...............25 ma *notice: stresses above those listed under maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. note 1: power dissipation is calculated as follows: pdis=v dd x {i dd - a i oh } + a {(v dd -v oh ) x i oh } + a(v o l x i ol ).
HCS365 ds41109d-page 24 preliminary ? 2002 microchip technology inc. table 9-1: dc characteristics: HCS365 dc characteristics all pins except power supply pins standard operating conditions (unless otherwise stated) operating temperature 0 c t a +70 c (commercial) -40 c t a +85 c (industrial) param no. sym. characteristic min. typ.? max. units conditions d001 v dd supply voltage 2.05 (4) 5.5 v d003 v por v dd start voltage to ensure internal power-on reset signal v ss v cold reset d004 sv dd v dd rise rate to ensure internal power-on reset signal 0.05 * v/ms d005 v bor brown-out reset voltage 1.9 2 v d010 i dd supply current (2) 1.05 maf osc = 4 mhz, v dd = 5.5v (3) d010b 2.0 ma f osc = 4 mhz, v dd = 3.5v (3) d021a i pd shutdown current 0.1 1.0 m av dd = 5.5v input low voltage v il input pins d030 with ttl buffer v ss 0.8 v 4.5v v dd 5.5v d030a v ss 0.15 v dd votherwise d031 with schmitt trigger buffer v ss 0.2 v dd v input high voltage v ih input pins d040 d040a with ttl buffer 2.0 (0.25 v dd +0.8) v dd v dd v v 4.5v v dd 5.5v otherwise d041 with schmitt trigger buffer 0.8 v dd v dd v input threshold voltage d053 vtol vlow detect tolerance + 200 + 350 mv mv setting 5 = 2.25v setting 25 = 4.25v input leakage current d060 i il input pins 1 m av ss v pin v dd , pin at hi- impedance, no pull-downs enabled
? 2002 microchip technology inc. preliminary ds41109d-page 25 HCS365 output low voltage d080 v ol output pins 0.6vi ol = 8.5 ma, v dd = 4.5v output high voltage d090 v oh output pins v dd -0.7 v i oh = -3.0 ma, v dd = 4.5v d091 v oh led 1.5 v i oh = -0.5 ma, v dd = 4.5v internal pull-down resistance d100 rpd s0 - s3 40 75 100 kohms if enabled data eeprom memory d120 e d endurance 200k 1000k e/w 25 c at 5v d121 vdrw v dd for read/write 2.05 5.5 v d122 tdew erase/write cycle time (1) 410ms note 1: * these parameters are characterized but not tested. 2: ? "typ" column data is at 5.0v, 25c unless otherwise stated. these parameters are for design guidance only and are not tested. 3: the supply current is mainly a function of the operating voltage and frequency. other factors such as i/o pin loading and switching rate, oscillator type, internal code execution pattern, and temperature also have an impact on the current consumption. 4: should operate down to v bor but not tested below 2.0v. the test conditions for all i dd measurements in active operation mode are: all i/o pins tristated, pulled to v dd . mclr = v dd ; wdt enabled/disabled as specified. the power-down/shutdown current in sleep mode does not depend on the oscillator frequency. power - down current is measured with the part in sleep mode, with all i/o pins in hi-impedance state and tied to v dd or v ss . the d current is the additional current consumed when the wdt is enabled. this current should be added to the base i dd or i pd measurement. table 9-1: dc characteristics: HCS365 (continued) dc characteristics all pins except power supply pins standard operating conditions (unless otherwise stated) operating temperature 0 c t a +70 c (commercial) -40 c t a +85 c (industrial) param no. sym. characteristic min. typ.? max. units conditions
HCS365 ds41109d-page 26 preliminary ? 2002 microchip technology inc. table 9-2: ac characteristics (1) commercial (c): t amb = 0 c to +70 c industrial (i): t amb = -40 c to +85 c 2.05v < v dd < 5.5 parameter sym. min. typ. max. unit conditions timing element t e 90 880 m s bsel = 00 2 (min) or bsel = 01 2 bsel = 10 2 bsel = 11 2 (max) power-up time t pu 25ms pll set-up time t pll 10 15 30 285 ms ms wait = 0 wait = 1 led on time t ledon 45 110 ms ledos = 0 (min) or ledos = 1 (max) led off time t ledoff 450 500 550 ms guard time t g 1.8 5.6 46.1 96.1 2t e 6.4 51.2 102.4 112.6 7.0 56.3 42.6 ms ms ms ms gsel = 00 2 (min) gsel = 01 2 gsel = 10 2 gsel = 11 2 (max) note 1: all timing values are subject to the oscillator variance and are not tested. these parameters are characterized, but not tested.
? 2002 microchip technology inc. preliminary ds41109d-page 27 HCS365 10.0 packaging information package type: 8-lead plastic dual in-line (p) C 300 mil (pdip) b1 b a1 a l a2 p a e eb b c e1 n d 1 2 units inches* millimeters dimension limits min nom max min nom max number of pins n 88 pitch p .100 2.54 top to seating plane a .140 .155 .170 3.56 3.94 4.32 molded package thickness a2 .115 .130 .145 2.92 3.30 3.68 base to seating plane a1 .015 0.38 shoulder to shoulder width e .300 .313 .325 7.62 7.94 8.26 molded package width e1 .240 .250 .260 6.10 6.35 6.60 overall length d .360 .373 .385 9.14 9.46 9.78 tip to seating plane l .125 .130 .135 3.18 3.30 3.43 lead thickness c .008 .012 .015 0.20 0.29 0.38 upper lead width b1 .045 .058 .070 1.14 1.46 1.78 lower lead width b .014 .018 .022 0.36 0.46 0.56 overall row spacing eb .310 .370 .430 7.87 9.40 10.92 mold draft angle top a 51015 51015 mold draft angle bottom b 51015 51015 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed jedec equivalent: ms-001 drawing no. c04-018 .010 (0.254mm) per side. significant characteristic
HCS365 ds41109d-page 28 preliminary ? 2002 microchip technology inc. package type: 8-lead plastic small outline (sm) C medium, 208 mil (soic) foot angle f 048048 15 12 0 15 12 0 b mold draft angle bottom 15 12 0 15 12 0 a mold draft angle top 0.51 0.43 0.36 .020 .017 .014 b lead width 0.25 0.23 0.20 .010 .009 .008 c lead thickness 0.76 0.64 0.51 .030 .025 .020 l foot length 5.33 5.21 5.13 .210 .205 .202 d overall length 5.38 5.28 5.11 .212 .208 .201 e1 molded package width 8.26 7.95 7.62 .325 .313 .300 e overall width 0.25 0.13 0.05 .010 .005 .002 a1 standoff 1.98 .078 a2 molded package thickness 2.03 .080 a overall height 1.27 .050 p pitch 8 8 n number of pins max nom min max nom min dimension limits millimeters inches* units a a2 a a1 l c b f 2 1 d n p b e e1 .070 .075 .069 .074 1.78 1.75 1.97 1.88 *controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010 (0.254mm) per side. drawing no. c04-056
? 2002 microchip technology inc. preliminary ds41109d-page 29 HCS365 10.1 package marking information legend: mm...m microchip part number information xx...x customer specific information* yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week 01) nnn alphanumeric traceability code note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. * standard marking consists of microchip part number, year code, week code and traceability code. for marking beyond this, certain price adders apply. please check with your microchip sales office. for sqtp devices, any special marking adders are included in sqtp price. xxxxxxxx xxxxxnnn yyww 8-lead pdip (300 mil) example HCS365 xxx/nnn 9925 8-lead soic (208 mil) xxxxxxxx example yywwnnn xxxxxxxx HCS365 9925nnn xxxxxxxx
HCS365 ds41109d-page 30 preliminary ? 2002 microchip technology inc. on-line support microchip provides on-line support on the microchip world wide web (www) site. the web site is used by microchip as a means to make files and information easily available to customers. to view the site, the user must have access to the internet and a web browser, such as netscape ? or microsoft ? explorer. files are also available for ftp download from our ftp site. connecting to the microchip internet web site the microchip web site is available by using your favorite internet browser to attach to: www.microchip.com the file transfer site is available by using an ftp ser- vice to connect to: ftp://ftp.microchip.com the web site and file transfer site provide a variety of services. users may download files for the latest development tools, data sheets, application notes, user's guides, articles and sample programs. a vari- ety of microchip specific business information is also available, including listings of microchip sales offices, distributors and factory representatives. other data available for consideration is: ? latest microchip press releases ? technical support section with frequently asked questions ? design tips ? device errata ? job postings ? microchip consultant program member listing ? links to other useful web sites related to microchip products ? conferences for products, development systems, technical information and more ? listing of seminars and events systems information and upgrade hot line the systems information and upgrade line provides system users a listing of the latest versions of all of microchip's development systems software products. plus, this line provides information on how customers can receive any currently available upgrade kits. the hot line numbers are: 1-800-755-2345 for u.s. and most of canada, and 1-480-792-7302 for the rest of the world.
? 2002 microchip technology inc. preliminary ds41109d-page 31 HCS365 reader response it is our intention to provide you with the best documentation possible to ensure successful use of your microchip prod- uct. if you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please fax your comments to the technical publications manager at (480) 792-7578. please list the following information, and use this outline to provide us with your comments about this data sheet. to: technical publications manager re: reader response total pages sent from: name company address city / state / zip / country telephone: (_______) _________ - _________ application (optional): would you like a reply? y n device: literature number: questions: fax: (______) _________ - _________ ds41109d HCS365 1. what are the best features of this document? 2. how does this document meet your hardware and software development needs? 3. do you find the organization of this data sheet easy to follow? if not, why? 4. what additions to the data sheet do you think would enhance the structure and subject? 5. what deletions from the data sheet could be made without affecting the overall usefulness? 6. is there any incorrect or misleading information (what and where)? 7. how would you improve this document? 8. how would you improve our software, systems, and silicon products?
HCS365 ds41109d-page 32 preliminary ? 2002 microchip technology inc. 11.0 HCS365 product identification system . to order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. * jw devices are uv erasable and can be programmed to any device configuration. jw devices meet the electrical requirement of each oscillator type. sales and support part no. x /xx xxx pattern package temperature range device device HCS365: code hopping encoder HCS365t: code hopping encoder (tape and reel - sm only) temperature range - = 0 c to +70c i = -40c to +85c package p = plastice dip (300 mil body), 8-lead sm = plastic soic (208 mil body), 8-lead pattern data sheets products supported by a preliminary data sheet may have an errata sheet describing minor operational differences and recom- mended workarounds. to determine if an errata sheet exists for a particular device, please contact one of the following: 1. your local microchip sales office 2. the microchip corporate literature center u.s. fax: (480) 792-7277 3. the microchip worldwide site (www.microchip.com) please specify which device, revision of silicon and data sheet (include literature #) you are using. new customer notification system register on our web site (www.microchip.com/cn) to receive the most current information on our products.
2002 microchip technology inc. preliminary ds41109d - page 33 information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. no representation or warranty is given and no liability is assumed by microchip technology incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. use of microchips products as critical com- ponents in life support systems is not authorized except with express written approval by microchip. no licenses are con- veyed, implicitly or otherwise, under any intellectual property rights. trademarks the microchip name and logo, the microchip logo, filterlab, k ee l oq , microid, mplab, pic, picmicro, picmaster, picstart, pro mate, seeval and the embedded control solutions company are registered trademarks of microchip tech- nology incorporated in the u.s.a. and other countries. dspic, economonitor, fansense, flexrom, fuzzylab, in-circuit serial programming, icsp, icepic, microport, migratable memory, mpasm, mplib, mplink, mpsim, mxdev, picc, picdem, picdem.net, rfpic, select mode and total endurance are trademarks of microchip technology incorporated in the u.s.a. serialized quick turn programming (sqtp) is a service mark of microchip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2002, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. microchip received qs-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona in july 1999. the companys quality system processes and procedures are qs-9000 compliant for its picmicro ? 8-bit mcus, k ee l oq ? code hopping devices, serial eeproms and microperipheral products. in addition, microchips quality system for the design and manufacture of development systems is iso 9001 certified. microchips secure data products are covered by some or all of the following patents: code hopping encoder patents issued in europe, u.s.a., and r.s.a. u.s.a.: 5,517,187; europe: 0459781; r.s.a.: za93/4726 secure learning patents issued in the u.s.a. and r.s.a. u.s.a.: 5,686,904; r.s.a.: 95/5429
ds41109d-page 34 preliminar y ? 2002 microchip technology inc. americas corporate office 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7200 fax: 480-792-7277 technical support: 480-792-7627 web address: http://www.microchip.com rocky mountain 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7966 fax: 480-792-7456 atlanta 500 sugar mill road, suite 200b atlanta, ga 30350 tel: 770-640-0034 fax: 770-640-0307 boston 2 lan drive, suite 120 westford, ma 01886 tel: 978-692-3848 fax: 978-692-3821 chicago 333 pierce road, suite 180 itasca, il 60143 tel: 630-285-0071 fax: 630-285-0075 dallas 4570 westgrove drive, suite 160 addison, tx 75001 tel: 972-818-7423 fax: 972-818-2924 detroit tri-atria office building 32255 northwestern highway, suite 190 farmington hills, mi 48334 tel: 248-538-2250 fax: 248-538-2260 kokomo 2767 s. albright road kokomo, indiana 46902 tel: 765-864-8360 fax: 765-864-8387 los angeles 18201 von karman, suite 1090 irvine, ca 92612 tel: 949-263-1888 fax: 949-263-1338 new york 150 motor parkway, suite 202 hauppauge, ny 11788 tel: 631-273-5305 fax: 631-273-5335 san jose microchip technology inc. 2107 north first street, suite 590 san jose, ca 95131 tel: 408-436-7950 fax: 408-436-7955 toronto 6285 northam drive, suite 108 mississauga, ontario l4v 1x5, canada tel: 905-673-0699 fax: 905-673-6509 asia/pacific australia microchip technology australia pty ltd suite 22, 41 rawson street epping 2121, nsw australia tel: 61-2-9868-6733 fax: 61-2-9868-6755 china - beijing microchip technology consulting (shanghai) co., ltd., beijing liaison office unit 915 bei hai wan tai bldg. no. 6 chaoyangmen beidajie beijing, 100027, no. china tel: 86-10-85282100 fax: 86-10-85282104 china - chengdu microchip technology consulting (shanghai) co., ltd., chengdu liaison office rm. 2401, 24th floor, ming xing financial tower no. 88 tidu street chengdu 610016, china tel: 86-28-6766200 fax: 86-28-6766599 china - fuzhou microchip technology consulting (shanghai) co., ltd., fuzhou liaison office unit 28f, world trade plaza no. 71 wusi road fuzhou 350001, china tel: 86-591-7503506 fax: 86-591-7503521 china - shanghai microchip technology consulting (shanghai) co., ltd. room 701, bldg. b far east international plaza no. 317 xian xia road shanghai, 200051 tel: 86-21-6275-5700 fax: 86-21-6275-5060 china - shenzhen microchip technology consulting (shanghai) co., ltd., shenzhen liaison office rm. 1315, 13/f, shenzhen kerry centre, renminnan lu shenzhen 518001, china tel: 86-755-2350361 fax: 86-755-2366086 hong kong microchip technology hongkong ltd. unit 901-6, tower 2, metroplaza 223 hing fong road kwai fong, n.t., hong kong tel: 852-2401-1200 fax: 852-2401-3431 india microchip technology inc. india liaison office divyasree chambers 1 floor, wing a (a3/a4) no. 11, oshaugnessey road bangalore, 560 025, india tel: 91-80-2290061 fax: 91-80-2290062 japan microchip technology japan k.k. benex s-1 6f 3-18-20, shinyokohama kohoku-ku, yokohama-shi kanagawa, 222-0033, japan tel: 81-45-471- 6166 fax: 81-45-471-6122 korea microchip technology korea 168-1, youngbo bldg. 3 floor samsung-dong, kangnam-ku seoul, korea 135-882 tel: 82-2-554-7200 fax: 82-2-558-5934 singapore microchip technology singapore pte ltd. 200 middle road #07-02 prime centre singapore, 188980 tel: 65-6334-8870 fax: 65-6334-8850 taiwan microchip technology taiwan 11f-3, no. 207 tung hua north road taipei, 105, taiwan tel: 886-2-2717-7175 fax: 886-2-2545-0139 europe denmark microchip technology nordic aps regus business centre lautrup hoj 1-3 ballerup dk-2750 denmark tel: 45 4420 9895 fax: 45 4420 9910 france microchip technology sarl parc dactivite du moulin de massy 43 rue du saule trapu batiment a - ler etage 91300 massy, france tel: 33-1-69-53-63-20 fax: 33-1-69-30-90-79 germany microchip technology gmbh gustav-heinemann ring 125 d-81739 munich, germany tel: 49-89-627-144 0 fax: 49-89-627-144-44 italy microchip technology srl centro direzionale colleoni palazzo taurus 1 v. le colleoni 1 20041 agrate brianza milan, italy tel: 39-039-65791-1 fax: 39-039-6899883 united kingdom arizona microchip technology ltd. 505 eskdale road winnersh triangle wokingham berkshire, england rg41 5tu tel: 44 118 921 5869 fax: 44-118 921-5820 03/01/02 w orldwide s ales and s ervice

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